Figure 1.

Schematic model of fabrication of Si nanohole arrays. (a) Si substrate, (b) aluminum film sputtered on Si substrate, (c) localized anodization of Si surface through barrier layer of upper porous alumina, (d) removal of barrier layer by chemical etching in phosphoric acid, (e) electroless plating, and (f) chemical etching of Si using Ag particles as catalyst.

Asoh et al. Nanoscale Research Letters 2013 8:410   doi:10.1186/1556-276X-8-410
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