Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx, GdOx, HfOx, and TaOx switching materials
1 Thin Film Nano Technology Laboratory, Department of Electronic Engineering, Chang Gung University, Tao-Yuan 333, Taiwan
2 Biomedical Engineering Research Center, Department of Electronic Engineering, Chang Gung University, Tao-Yuan 333, Taiwan
Nanoscale Research Letters 2013, 8:379 doi:10.1186/1556-276X-8-379Published: 6 September 2013
Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled ‘SET/RESET’ current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.