Fabrication, characterization and simulation of Ω-gate twin poly-Si FinFET nonvolatile memory
1 Department of Engineering and System Science, National Tsing Hua University, 101, Section 2 Kuang Fu Road, Hsinchu, 30013, Taiwan
2 Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, 1001, Ta Hsueh Road, Hsinchu, 30013, Taiwan
Citation and License
Nanoscale Research Letters 2013, 8:331 doi:10.1186/1556-276X-8-331Published: 22 July 2013
This study proposed the twin poly-Si fin field-effect transistor (FinFET) nonvolatile memory with a structure that is composed of Ω-gate nanowires (NWs). Experimental results show that the NW device has superior memory characteristics because its Ω-gate structure provides a large memory window and high program/erase efficiency. With respect to endurance and retention, the memory window can be maintained at 3.5 V after 104 program and erase cycles, and after 10 years, the charge is 47.7% of its initial value. This investigation explores its feasibility in the future active matrix liquid crystal display system-on-panel and three-dimensional stacked flash memory applications.