Formation of silicon nanostructures with a combination of spacer technology and deep reactive ion etching
Nanoelectronics Cluster, MIMOS Berhad, Technology Park Malaysia, Kuala Lumpur 57000, Malaysia
Nanoscale Research Letters 2012, 7:288 doi:10.1186/1556-276X-7-288Published: 6 June 2012
A new method of fabricating high aspect ratio nanostructures in silicon without the use of sub-micron lithographic technique is reported. The proposed method comprises two important steps including the use of CMOS spacer technique to form silicon nitride nanostructure masking followed by deep reactive ion etching (DRIE) of the silicon substrate to form the final silicon nanostructures. Silicon dioxide is used as the sacrificial layer to form the silicon nitride nanostructures. With DRIE a high etch selectivity of 50:1 between silicon and silicon nitride was achieved. The use of the spacer technique is particularly advantageous where self-aligned nanostructures with potentially unlimited lengths are formed without the need of submicron lithographic tools and resist materials. With this method, uniform arrays of 100 nm silicon nanostructures which are at least 4 μm tall with aspect ratio higher than 40 were successfully fabricated.