Figure 4.

Schematic circuit diagram of In₂O₃nanowire FeFET (a) and characteristics of PZT-gated In₂O₃NW transistor (b). The PZT-gated In₂O₃ NW transistor with V_DS = −0.1 V shows pronounced hysteresis. ‘1’ and ‘0’ denote two states at V_G = 0 V for the memory operation.