Figure 18.

Schematic illustration of DPN method, the AFM image, and memory performance of the fabricated device. (a) Preparation of an Au-metal gate using AuCl4 solution with a writing speed of approximately 300 nm/s by the DPN method. (b) A CNT-based nonvolatile memory device made of a CNT channel, a nanostructured PVDF-TrFE-gate insulator, and an Au-metal gate. (c) AFM image of the CNT-based nonvolatile memory device, entirely composed of nanostructured elements. (d) Two retained IDS states plotted as a function of the relaxation time. (e) Fatigue-test result of the PVDF-TrFE-based FET memory device.

Liu et al. Nanoscale Research Letters 2012 7:285   doi:10.1186/1556-276X-7-285
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