Figure 4.

ID-VG behaviors of the JL NW device. ID-VG behaviors of the JL NW device for multilevel programming operation with gate biases of 9, 11, and 13 V for 100 ns. Inset shows the definition of Vth range for each state.

Su et al. Nanoscale Research Letters 2012 7:162   doi:10.1186/1556-276X-7-162
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