Figure 3.

The chip. Picture of the final chip containing the eight probes. (a) The chip bonded on the PCB; (b) layout of the chip; (c) zoom of one of the probes: G1 and G2 indicate the pads of the gates.

Motto et al. Nanoscale Research Letters 2012 7:113   doi:10.1186/1556-276X-7-113
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