Figure 7.

Current versus voltage plots and variation of barrier heights and ideality factor. (a) Current versus voltage plots of the InN NRs/n-Si diode at different temperatures. (b) Variation of barrier heights and ideality factor with temperature.

Kumar et al. Nanoscale Research Letters 2011 6:609   doi:10.1186/1556-276X-6-609
Download authors' original image