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Two novel low-power and high-speed dynamic carbon nanotube full-adder cells

Mehdi Bagherizadeh1* and Mohammad Eshghi2

Author Affiliations

1 Science and Research Branch of Islamic Azad University, Tehran, Iran

2 Shahid Beheshti University, GC, Tehran, Iran

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Nanoscale Research Letters 2011, 6:519  doi:10.1186/1556-276X-6-519

Published: 2 September 2011


In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold voltages (low threshold, normal threshold, and high threshold) are used. First design generates SUM and COUT through separate transistors, and second design is a multi-output dynamic full adder. Proposed full adders are simulated using HSPICE based on CNFET model with 0.9 V supply voltages. Simulation result shows that the proposed designs consume less power and have low power-delay product compared to other CNFET-based full-adder cells.

carbon nanotube transistor; dynamic full adder; low power; high speed