Figure 3.
a Measured (solid line) IDS—VDS curves for fabricated Si nanoribbon FETs. (The dashed lines show the corresponding results obtained from the 2D numerical simulations). b–e show the channel cross-sections of the device, indicating the conduction current
density contours for the ‘on’ state b at room temperature and cT = 150°C with VSUB = 0, and for the ‘off’ state d at room temperature and eT = 150°C with VSUB = 0
Choi et al. Nanoscale Research Letters 2010 5:1795 doi:10.1007/s11671-010-9714-y |