Open Access Nano Express

Hierarchical Cd4SiS6/SiO2 Heterostructure Nanowire Arrays

Jian Liu, Chunrui Wang*, Qingqing Xie, Junsheng Cai and Jing Zhang

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Department of Applied Physics and State Key Laboratory for Modification of Chemical Fibers and Polymer Materials, Donghua University, 2999 Renmin Rd. North, 201620, Songjiang District, Shanghai, People’s Republic of China

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Citation and License

Nanoscale Research Letters 2009, 5:231-236  doi:10.1007/s11671-009-9470-z

The electronic version of this article is the complete one and can be found online at:

Received:1 August 2009
Accepted:14 October 2009
Published:29 October 2009

© 2009 to the authors


Novel hierarchical Cd4SiS6/SiO2 based heterostructure nanowire arrays were fabricated on silicon substrates by a one-step thermal evaporation of CdS powder. The as-grown products were characterized using scanning electron microscopy, X-ray diffraction, and transmission electron microscopy. Studies reveal that a typical hierarchical Cd4SiS6/SiO2 heterostructure nanowire is composed of a single crystalline Cd4SiS6 nanowire core sheathed with amorphous SiO2 sheath. Furthermore, secondary nanostructures of SiO2 nanowires are highly dense grown on the primary Cd4SiS6 core-SiO2 sheath nanowires and formed hierarchical Cd4SiS6/SiO2 based heterostructure nanowire arrays which stand vertically on silicon substrates. The possible growth mechanism of hierarchical Cd4SiS6/SiO2 heterostructure nanowire arrays is proposed. The optical properties of hierarchical Cd4SiS6/SiO2 heterostructure nanowire arrays are investigated using Raman and Photoluminescence spectroscopy.

Cd4SiS6/SiO2; Nanowire arrays; Thermal evaporation; Optical property


One-dimensional (1D) nanostructures with modulated compositions have recently become of particular interest with respect to potential applications in nanoscale building blocks of future optoelectronic devices and systems [1-3]. Among them, core/shell(or sheath) nanostructure materials can prevent oxidation of semiconductor 1D nanostructures and thus forestall interference in the building blocks of complex nanoscale circuits [4,5]. Therefore, core/shell(or sheath)structures, such as nanocables, have attracted recent research focused on nanodevice applications such as field-effect transistors (FET) and light-emitting diodes (LED) [6,7]. Very recently, significant progress has been made on the synthesis of complex 1D core/shell(or sheath) nanostructures such as Zn/ZnS core/shell (or sheath) fibers [8], TiO2/SiO2 nanocables [9], ZnS/SiO2 core/shell(or sheath)nanowires [10,11], and ZnO/SiO2 core/shell nanorods [12]. Among these reports, most SiO2 based 1D core/sheath (or core/shell) nanostructures were synthesized via complicated methods, such as high-temperature thermal evaporation of mixed materials [11] or two-step process [12].

However, the extensive reports of 1D core/shell(or sheath)structure growth have revealed several challenges that remain before these tools may practically be applied to commercial or industrial needs [10]. The first challenge is how to fabricate long nanostructures that can be easily integrated and manipulated post-synthesis through simple methods. The second challenge is how to organize the long nanostructures in ordered or aligned patterns and in high densities. The third challenge is how to form SiO2 protective layer which is coated on 1D semiconductor nanostructures forms core/shell structures in order to protect the active layer in nanoelectronic circuits and obtain the noteworthy properties of the corresponding nanodevices [13,14].

Cd4SiS6, a wide band gap semiconductor (E.g = 2.50 eV at 300 K), is a potential material used in electroluminescent devices (ELD) as its emission of visible light. To date, only few works have been successfully completed on Cd–Si–S system. For example, Odin et al. [15] have reported the cathodoluminescence property of Cd4SiS6 crystal. Zhan et al. [16] have documented the synthesis and microstructure of Cd4SiS6/Si composite nanowires. In this paper, we report on the fabrication, structure, and properties of hierarchical Cd4SiS6/SiO2 heterostructure nanowire arrays via a simple one-step thermal evaporation of CdS powder. The present work may be a rational route for meeting the earlier mentioned three obstacles.

Experimental Details

The as-grown hierarchical Cd4SiS6/SiO2 heterostructure nanowire arrays were synthesized using a high-temperature vacuum-tube furnace, as described in detail elsewhere [17]. Briefly, CdS powder (1.5 g) was placed on an alumina boat in the center region of a quartz tube. Silicon substrates that were covered with Au thin film were placed in downstream to collect the products in the quartz tube. The tube was then pumped down to a base pressure of ~2×10−2 Torr (1 Torr ≈ 133 Pa). Argon gas was introduced into the tube at a constant flow rate of 200 sccm. The total pressure was kept at 2 × 10−2 Torr during the experimental process. The furnace was maintained at 900 °C for two hours before it was cooled to room temperature. A large yield of light yellow product was deposited on the silicon substrates.

The morphology of the samples was examined by scanning electron microscopy (SEM, FEI SIRION 200). The crystallographic structures of the as-grown product were investigated by X-ray diffraction (XRD, RIGAKU D/Max-2550), transmission electron microscopy (TEM, JEOL JEM-2010, operated at 200 kV), and high-resolution TEM (HRTEM, JEOL JEM-2010F, operated at 200 kV) equipped with an energy dispersive X-ray spectrometer (EDS) The Raman spectrum was recorded on Raman spectrometer (NEXUS-670) with 514.5 nm radiations at room temperature. Photoluminescence spectroscopy was performed using the Xe lamp spectrophotometer (970CRT) at 350-nm line.

Results and Discussions

SEM was used to examine the morphologies of the as-product. Figure 1a is a SEM image of the as-synthesized product. All the products display a wire-like (or rod-like) morphology with an average diameter ranging from 500 nm to 1 μm and length up to several millimeters. The sub-microwires (or sub-microrods) are well-aligned on silicon (100) substrates. The sub-microwires (or sub-microrods) grown mainly along two intersectant directions (indicated by arrows, as shown in Fig. 1a) which is similar to the case of ZnSe nanowires growth along <111> direction on GaAs (001) substrate [18] and Si, Ge nanowires growth along <111> direction on Si (001) substrate [19,20], and the light–dark-light contrast was observed obviously along the wire’s radial direction, which suggests the sub-microwire (or sub-microrod) with core/shell structure. XRD pattern of the as-grown products is shown in Fig. 1b. All the peaks can be indexed to monoclinic Cd4SiS6 structure with lattice constants a = 12.31 Å, b = 7.041 Å, c = 12.33 Å, β = 110.38° (JCPDS Card. No. 72–0799). No peaks due to other phases such as CdS, Cd, and Si were detected, indicating the high purity of the products.

thumbnailFigure 1. a SEM image of the as-fabricated aligned sub-microwires, the arrows are the schematic directions of the sub-microwires. b The XRD pattern of the products

The detailed microstructures of Cd4SiS6 sub-microwires are characterized using TEM and HRTEM. Figure 2a is a typical TEM image of a single Cd4SiS6 sub-microwire from the as-grown product. The light–dark-light contrast was observed along the radial direction, suggesting different phase compositions with core/sheath structure along the wire’s radial direction, which is in accord with the result of SEM. The diameter of the sub-microwire is approximately 1 μm, which also is consistent with SEM result. The diameter of the core and thickness of the sheath are approximately 300–500 nm and 250 nm, respectively. The compositions of the core and the shell of sub-microwire are checked using energy dispersive X-ray analysis (EDX), as shown in Fig. 2b2b indicates that the wire’s core (marked as c, see Fig. 2a) is mainly composed of Cd, S, Si ,and O. EDX spectrum taken from the sub-microwire sheath (marked as s, as shown in Fig. 2a) shows the presence of Si and O with an approximate stoichiometry of SiO2(Fig. 2c). The peaks of Cu in those figures originate from the TEM sample grid. The EDX results clearly reveal the formation of Cd4SiS6 sub-microwires with SiO2 sheath. The high-resolution TEM (HRTEM) image recorded from the joint part (as boxed region in Fig. 2a) of the core Cd4SiS6 and the shell SiO2 is shown in Fig. 2d, which shows that the SiO2 shells are amorphous, while the Cd4SiS6 core sub-microwires are single crystalline. The observed inter-planar d spacing is 0.36 nm corresponds well with that of the lattice spacing ofplanes of the Cd4SiS6. And it indicates that the Cd4SiS6 cores grow along thedirections. The selected area electron diffraction (SAED) pattern is given in Fig. 2e, which further reveals that the Cd4SiS6 core has a single crystal structure. All studies reveal that the as-grown product is sub-microwires composited of single crystalline Cd4SiS6 core/amorphous SiO2 sheath with uniform oriented wire-like morphologies.

thumbnailFigure 2. a TEM image of single core/shell sub-microwire. b, c EDX patterns of the Cd4SiS6/SiO2 core/shell sub-microwires’ core and shell. d HRTEM image depicting the Cd4SiS6/SiO2 core/shell sub-microwire. e SAED pattern of the Cd4SiS6/SiO2 core/shell sub-microwire

Based on the earlier mentioned experimental result, we conducted the experiment with different parameters, that is, changed the position of silicon substrate, but kept the other parameters identical. And we obtained hierarchical of Cd4SiS6/SiO2 heterostructure nanowire arrays.

Figure 3 is SEM images of as-synthesized hierarchical Cd4SiS6/SiO2 nanowire arrays deposited on a silicon substrate after modifying the experimental parameters. Compared to the sample discussed earlier, although their XRD result is similar, their morphology differs tremendously. Figure 3a is a SEM image of the as-grown Cd4SiS6/SiO2 hierarchical nanowires arrays on silicon substrate. The image reveals that the substrate is primarily covered with well-aligned hierarchical nanowires, which have an average diameter of 5 μm and length of several millimeters. The wires are rather uniform and grow vertically on silicon substrates. As shown in Fig. 3b, each wire has a cereus-like morphology, that is, there are uniform symmetrical secondary nanowires grown perpendicularly out of single nanowire. The secondary nanowires taper to tip and have length range from 1 to 2 μm as shown in Fig. 3c.

thumbnailFigure 3. a SEM image of the hierarchical nanowire arrays. b SEM of the single hierarchical nanowire. c SEM of the secondary nanowires

The structures and morphologies of the hierarchical Cd4SiS6/SiO2 nanowires were further characterized using TEM. Figure 4a is a TEM image of individual wire that presents a hierarchical morphology. The sub-microwire is uniform, with diameter of 5 μm. Figure 4b is the TEM image of the secondary nanowires, which shows the secondary nanowires are amorphous, with the diameter gradually decreasing from 200 to 100 nm. The insert in Fig. 4b is the SAED pattern of secondary nanowires, further confirms the secondary nanowires are amorphous. EDX of the body and the secondary nanowires are shown in Fig. 4c, 4d, which indicate that the sub-microwire’s body is mainly composed of Cd, S, Si, O, and Cu, while the secondary nanowires are mainly composed of Si, O, and Cu. The peaks of Cu in these figures originate from the TEM sample grid. The TEM and EDX results demonstrate that the as-grown product is a composite material of Cd4SiS6/SiO2 with hierarchical wire-like morphology.

thumbnailFigure 4. a TEM image depicting single hierarchical nanowire. b TEM image of the secondary nanowires, insert is SAED of secondary nanowires. c, d EDX patterns of the Cd4SiS6/SiO2 sub-microrods’ body and secondary nanowires

The experimental results suggest that the hierarchical Cd4SiS6/SiO2 heterostructure nanowires arrays are grown via a secondary growth mechanism. Based on thermodynamics [16], the chemical reactions involved in the process may be proposed as follows:

Based on all the earlier mentioned reactions, we deduce the possible formation process of the hierarchical Cd4SiS6/SiO2 heterostructure nanowires arrays as shown in Fig. 5. CdS powder is gradually turned into CdS vapor under high temperature, which can be transported to the downstream region with argon gas. The small Au–Si alloy droplets on substrates are energetically favored sites for the absorption of incoming CdS vapor and residuary O2 in the tube. This process leads to the formation of Cd4SiS6/SiO2 core/shell nanocables, which can be used as templates for the secondary deposition of the SiO2, resulting in the formation of secondary SiO2 nanowires, and finally, leads to the formation of hierarchical Cd4SiS6/SiO2 heterostructure nanowires arrays. The similar vapor transfer and second growth mechanism have been reported in previous works, such as Zn/ZnS core/shell fibers [8], hierarchical ZnS/SiO2 nanowire heterostructures [11], and ZnSe/Si bi-coaxial nanowire heterostructures [21].

thumbnailFigure 5. Schematic illustration of the formation of hierarchical Cd4SiS6/SiO2 nanowires via a secondary growth process.I formation of Au–Si alloy droplets,II simultaneous growth of Cd4SiS6 core and SiO2 shell,III formation of Cd4SiS6/SiO2 sub-microcables,IV,V growth of hierarchical Cd4SiS6/SiO2 nanowires

Figure 6a is structure model of monoclinic Cd4SiS6 crystal. In the monoclinic Cd4SiS6, both of silicon and cadmium atoms are surrounded by four sulfur atoms, and the SiS4 tetrahedrons are interconnected by the CdS4 tetrahedrons [16]. Therefore, Raman spectrum of Cd4SiS6 crystal displays a complex behavior with two modes, which can be assigned to the vibrational modes of Cd–S and Si–S. This behavior is very similar to SnS2−xSex[22], NiS2−xSex[23], and PbSnS3[24], which can be assigned to the vibrational modes of SnS2 and SnSe2, NiS2 and NiSe2, PbS and SnS2, respectively. Figure 6b shows Raman spectrum of as-prepared hierarchical Cd4SiS6/SiO2 nanowires arrays at room temperature. As far as we know, the spectrum of Cd4SiS6 structures has not been reported before in the literature. There are five Raman peaks at 209, 235, 302, 414, and 596 cm−1 in Fig. 6b. According to ref. [25], we can assign the most intensive peak at 414 cm−1 to the mode of A1(SiS4). The peak at 302 and 596 cm−1 are attributed to the scatterings of the 1LO phonon (first order) and 2LO phonon (second order) of CdS, respectively, which has small blue-shift compared with that of the bulk CdS powders [26]. The small blue-shift might be caused by the strong internal strain in the core [27]. The other two peaks at 209 and 235 cm−1 can be attributed to the scattering of the phonons of the CdS, which is consistent with previous reports of the CdS nanowires [26]. The multiphonon scatting and E1-TO Raman bands of bulk CdS are located at 207 and 235 cm−1, respectively [28]. Generally, the relative intensity of the vibtational mode of amorphous SiO2 (frequencies at ~1050 and ~400 cm−1, respectively) is too weak to be detected. In our research, although the thickness of amorphous SiO2 sheath is comparable with the diameter of Cd4SiS6, Raman band of amorphous SiO2 shell was not observed, which is similar to our previous report on the SiO2 nanobelts [29].

thumbnailFigure 6. a Structure model of Cd4SiS6 crystal. b Room-temperature Raman Spectrum of hierarchical Cd4SiS6/SiO2 heterostructure nanowires

Figure 7 shows the room-temperature PL properties of the as-grown hierarchical Cd4SiS6/SiO2 heterostructure nanowires arrays. The spectrum shows two emission bands centered at 483 and 697 nm, respectively. The strong band located at 483 nm, which has been observed in a similar position in the CL spectra of Cd4SiS6 crystal [15], presumably results from near-band-edge emission of Cd4SiS6 cores (E.g = 2.50 eV). And the wide peak centered at 697 nm may be connected with the special core/sheath complex structures.

thumbnailFigure 7. Room-temperature PL Spectrum of hierarchical Cd4SiS6/SiO2 heterostructure nanowires


In summary, hierarchical Cd4SiS6/SiO2 heterostructure nanowires arrays have been prepared on silicon substrates via simple thermal evaporation with CdS powder. Studies indicate that the hierarchical Cd4SiS6/SiO2 nanowires heterostructure arrays consist of a single crystalline Cd4SiS6 core coated amorphous SiO2 and adjacent amorphous SiO2 nanowires. The formation process of the hierarchical nanowires arrays was also discussed on the basis of thermodynamic aspect. The properties of hierarchical Cd4SiS6/SiO2 heterostructure nanowires were characterized by RS and PL. The Raman peaks can be assigned to the modes of Cd–S and Si–S. In PL spectra, the peak at 483 nm can be identified as the near-band-edge emission of Cd4SiS6 cores. The long and uniform Cd4SiS6/SiO2 heterostructure nanowires arrays may be applied as potential building blocks in nanodevices.


This work was supported by the National Natural Science Foundation of China under Grant No. 20671018, 10775031, and 10835004.


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